Sr. ASIC Design Engineer
Job Description
This range is provided by AMD. Your actual pay will be based on your skills and experience — talk with your recruiter to learn more.
Base pay range
$124,000.00/yr - $186,000.00/yr
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
The Role
As an ASIC Design Engineer, you'll focus on planning, building, and executing the design of new and existing features for AMD’s multimedia IP.
THE PERSON:
You have a passion for modern, complex processor architecture, and digital design. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be designed
- Lead micro-architecture and design efforts based on high level architectural requirements
- Able to build complex systems to meet various design requirements including (but not limited to) functionality, performance, power, area, scalability and testability
- Develop and execute implementation and validation plans of features. Proactive in driving and resolving any issues that may arise during the development stage
- Resolve pre-layout and post-layout timing and functional ECO issues
- Proficient in IP level ASIC design
- Have in-depth knowledge of the entire design process
- Experienced with Verilog, System Verilog
- Experience with multi-clock domain designs
- Strong in both written and verbal communication
- Strong analytical thinking and problem-solving skills
- Good teamwork and interpersonal skills
- Desirable assets with prior exposure to video/display standards or other multimedia solutions
ACADEMIC CREDENTIALS:
- Undergrad degree required. Bachelors or Masters degree in computer engineering/Electrical Engineering preferred + minimum 5-7 years relevant experience
Markham, ON
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Seniority level
Seniority level
Mid-Senior level
Employment type
Employment type
Full-time
Job function
Industries
Semiconductor Manufacturing
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