Verification Engineer – IP Blocks, UVM & Formal Methods
Advanced Micro Devices, IncVancouver, Canada
100 - 125 Posted: 6 hours ago
Job Description
A leading technology company in Vancouver is seeking a Verification Engineer to work on cutting-edge communication protocols. The ideal candidate will have extensive hardware verification experience and proficiency in Verilog and SystemVerilog. Responsibilities include developing testbenches, working on verification methodologies like UVM, and maintaining test cases. A Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required. This role offers exciting challenges in a collaborative environment.#J-18808-Ljbffr
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